Four-Level Quasi-Nested Inverter Topology for Single-Phase Applications
| Autor: | Carlos A. Reusser, Hector Young |
|---|---|
| Rok vydání: | 2021 |
| Předmět: |
proportional multi resonant controller
multilevel inverter Computer Networks and Communications Computer science 020209 energy lcsh:TK7800-8360 Topology (electrical circuits) 02 engineering and technology Topology law.invention reduced active switches topology law level-shifted PWM single-phase applications 0202 electrical engineering electronic engineering information engineering Waveform Electrical and Electronic Engineering Diode business.industry lcsh:Electronics 020208 electrical & electronic engineering DC-link voltage self-balancing Capacitor Semiconductor quasi-Nested topology Hardware and Architecture Control and Systems Engineering Modulation Capacitor voltage Signal Processing Inverter business Voltage |
| Zdroj: | Electronics Volume 10 Issue 3 Electronics, Vol 10, Iss 233, p 233 (2021) |
| ISSN: | 2079-9292 |
| DOI: | 10.3390/electronics10030233 |
| Popis: | In this paper, a novel four-level single-phase multilevel converter is introduced, consisting of six active switches arranged in a quasi-nested configuration. The proposed topology synthesizes its output voltage levels with respect to a floating neutral point, using four cascaded capacitors with identical voltage levels. The proposed converter contains a reduced number of components compared to the neutral point clamped (NPC) or active-NPC topologies (ANPC) for the same number of output voltage levels, since it does not require diode or active switch clamping to a neutral point. Moreover, no floating capacitors with asymmetric voltage levels are employed, thereby simplifying the capacitor voltage balancing. The switching operation principles, modulation technique and control scheme for supplying a single-phase resistive-inductive load are addressed in detail. The proposed four-level inverter allows generating an additional output voltage level with the same semiconductor count as conventional three-level inverters such as NPC and ANPC which allows a superior waveform quality, with a THDv reduction of 32.69% in comparison the clamped inverters. Experimental tests carried out in a laboratory-scale setup verify the feasibility of the proposed topology. |
| Databáze: | OpenAIRE |
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