Efficient hardware implementation for lightweight mCrypton algorithm using FPGA
| Autor: | Maryam Adnan Fadel, Ahmed Salah Hameed, Yasir Amer Abbas, Safa Hazim Alwan |
|---|---|
| Rok vydání: | 2021 |
| Předmět: |
Control and Optimization
Computer Networks and Communications Computer science Cryptography mCrypton VHDL Radio-frequency identification Electrical and Electronic Engineering Architecture Field-programmable gate array Throughput (business) FPGA computer.programming_language Hardware architecture Lightweight business.industry Hardware and Architecture Signal Processing business Wireless sensor network computer Algorithm Computer hardware Information Systems |
| Zdroj: | Indonesian Journal of Electrical Engineering and Computer Science. 23:1674 |
| ISSN: | 2502-4760 2502-4752 |
| DOI: | 10.11591/ijeecs.v23.i3.pp1674-1680 |
| Popis: | The lightweight cryptography is used for low available resources devices such as radio frequency identification (RFID) tags, internet of things (IoTs) and wireless sensor networks. In such case, the lightweight cryptographic algorithms should consider power consumption, design area, speed, and throughput. This paper presents a new architecture of mCrypton lightweight cryptographic algorithm which considers the above-mentioned conditions. Resource-shared structure is used to reduce the area of the new architecture. The proposed architecture is implemented using ISE Xilinx V14,5 and Spartan 3 FPGA platform. The simulation results introduced that the proposed design area is 375 of slices, up to 302 MHz operating frequency, a throughput of 646 Mbps, efficiency of 1.7 Mbps/slice and 0.089 Watt power consumption. Thus, the proposed architecture outperforms similar architectures in terms of area, speed, efficiency and throughput. |
| Databáze: | OpenAIRE |
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