Back gate impact on the noise performances of 22FDX fully-depleted SOI CMOS
| Autor: | Kane, Ousmane Magatte, Lucci, Luca, Scheiblin, Pascal, Poiroux, Thierry, Barbé, Jean-Charles, Danneville, Francois |
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| Přispěvatelé: | Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Advanced NanOmeter DEvices - IEMN (ANODE - IEMN), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Université catholique de Lille (UCL)-Université catholique de Lille (UCL), Université catholique de Lille (UCL)-Université catholique de Lille (UCL)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA) |
| Jazyk: | angličtina |
| Rok vydání: | 2021 |
| Předmět: | |
| Zdroj: | 15th European Microwave Integrated Circuits Conference, EuMIC 2020 15th European Microwave Integrated Circuits Conference, EuMIC 2020, Jan 2021, Utrecht, Netherlands. 81-84, https://ieeexplore.ieee.org/abstract/document/9337333 |
| Popis: | International audience; Ultra-Thin-Body and Back-oxide Fully-Depleted Silicon-On-Insulator (UTBB-FDSOI) MOSFETs are the most recent and advanced Silicon-On-Insulator (SOI) architecture proposed to overcome the down-scaling limitations of traditional bulk devices. The UTBB-FDSOI architecture has already been proved very attractive for RF-mmW circuits thanks to the excellent reported RF figure of merits (FOMs).In this article, we report on an experimental investigation of the back gate biasing impact on the high-frequency (HF) noise performances of an advanced 22 nm UTBB-FDSOI technology developed by GLOBALFOUNDRIES. For the lower gate voltages, the back gate biasing was shown to decrease by one third the equivalent noise resistance (Rn). Moreover, a 3 dB increase for the associated gain (Ga) was achieved at Vg=0.3V. A relaxed contacted-poly-pitch was also shown to decrease Rn by 11%. |
| Databáze: | OpenAIRE |
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