Efficient Software Packet Processing on Heterogeneous and Asymmetric Hardware Architectures
| Autor: | Lazaros Koromilas, Ioannis Manousakis, Giorgos Vasiliadis, Sotiris Ioannidis |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
Computer Networks and Communications
Computer science business.industry Network packet Packet processing 020206 networking & telecommunications Throughput 02 engineering and technology Computer Science Applications Scheduling (computing) High-definition video Software Embedded system Packet analyzer 0202 electrical engineering electronic engineering information engineering Hardware acceleration 020201 artificial intelligence & image processing Central processing unit Electrical and Electronic Engineering business Computer Science::Operating Systems Processing delay Computer hardware |
| Zdroj: | ANCS |
| ISSN: | 1558-2566 1063-6692 |
| Popis: | Heterogeneous and asymmetric computing systems are composed by a set of different processing units, each with its own unique performance and energy characteristics. Still, the majority of current network packet processing frameworks targets only a single device (the CPU or some accelerator), leaving the rest processing resources unused and idle. In this paper, we propose an adaptive scheduling approach that supports the heterogeneous and asymmetric hardware, tailored for network packet processing applications. Our scheduler is able to respond quickly to dynamic performance fluctuations that occur at real time, such as traffic bursts, application overloads, and system changes. The experimental results show that our system is able to match the peak throughput of a diverse set of packet processing applications, while consuming up to $3.5\times$ less energy. |
| Databáze: | OpenAIRE |
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