Development of field programmable gate array–based encryption module to mitigate man-in-the-middle attack for nuclear power plant data communication network
Autor: | Mohamed Abdallah Elakrat, Jae Cheon Jung |
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Rok vydání: | 2018 |
Předmět: |
business.industry
Serial communication Computer science Advanced Encryption Standard 020206 networking & telecommunications Cryptography 02 engineering and technology Encryption Communications system lcsh:TK9001-9401 System requirements Nuclear Energy and Engineering Embedded system Personal computer 0202 electrical engineering electronic engineering information engineering lcsh:Nuclear engineering. Atomic power 020201 artificial intelligence & image processing business Field-programmable gate array |
Zdroj: | Nuclear Engineering and Technology, Vol 50, Iss 5, Pp 780-787 (2018) |
ISSN: | 1738-5733 |
Popis: | This article presents a security module based on a field programmable gate array (FPGA) to mitigate man-in-the-middle cyber attacks. Nowadays, the FPGA is considered to be the state of the art in nuclear power plants I&C systems due to its flexibility, reconfigurability, and maintainability of the FPGA technology; it also provides acceptable solutions for embedded computing applications that require cybersecurity. The proposed FPGA-based security module is developed to mitigate information-gathering attacks, which can be made by gaining physical access to the network, e.g., a man-in-the-middle attack, using a cryptographic process to ensure data confidentiality and integrity and prevent injecting malware or malicious data into the critical digital assets of a nuclear power plant data communication system. A model-based system engineering approach is applied. System requirements analysis and enhanced function flow block diagrams are created and simulated using CORE9 to compare the performance of the current and developed systems. Hardware description language code for encryption and serial communication is developed using Vivado Design Suite 2017.2 as a programming tool to run the system synthesis and implementation for performance simulation and design verification. Simple windows are developed using Java for physical testing and communication between a personal computer and the FPGA. Keywords: AES-128, Cyber Security, Encryption, Field Programmable Gate Array, I&C |
Databáze: | OpenAIRE |
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