Impact of Low-Variability SOTB Process on Ultra-Low-Voltage Operation of 1 Million Logic Gates
| Autor: | Toshiyuki Tsutsumi, Yasuhiro Ogasahara, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2015 |
| Předmět: |
Engineering
Silicon business.industry Transistor Process (computing) Electrical engineering chemistry.chemical_element lcsh:Applications of electric power SOTB lcsh:TK4001-4102 ultra-low voltage Subthreshold slope law.invention measurement on silicon chemistry law Logic gate FD-SOI Electrical and Electronic Engineering Process variability business Low voltage Efficient energy use |
| Zdroj: | Journal of Low Power Electronics and Applications, Vol 5, Iss 2, Pp 116-129 (2015) Journal of Low Power Electronics and Applications Volume 5 Issue 2 Pages 116-129 |
| ISSN: | 2079-9268 |
| Popis: | In this study, we demonstrate near-0.1 V minimum operating voltage of a low-variability Silicon on Thin Buried Oxide (SOTB) process for one million logic gates on silicon. Low process variability is required to obtain higher energy efficiency during ultra-low-voltage operation with steeper subthreshold slope transistors. In this study, we verify the decrease in operating voltage of logic circuits via a variability-suppressed SOTB process. In our measurement results with test chips fabricated in 65-nm SOTB and bulk processes, the operating voltage at which the first failure is observed was lowered from 0.2 to 0.125 V by introducing a low-variability SOTB process. Even at 0.115 V, over 40% yield can be expected as per our measurement results on SOTB test chips. |
| Databáze: | OpenAIRE |
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