| Autor: |
Nyssens, Lucas, Rack, Martin, Wane, S., Schwan, C., Lehmann, S., Zhao, Z., Lucci, L., Lugo-Alvarez, J., Gaillard, F., Raskin, Jean-Pierre, Lederer, Dimitri |
| Přispěvatelé: |
UCL - SST/ICTM/ELEN - Pôle en ingénierie électrique |
| Rok vydání: |
2022 |
| Zdroj: |
2022 17th European Microwave Integrated Circuits Conference (EuMIC). |
| Popis: |
This paper presents a 2-stage low-noise amplifier (LNA) designed in 22 nm fully-depleted silicon-on-insulator (FD- SOI) technology, covering the N259 and N260 millimeter-wave 5G bands. The prototype features 19.9 dB peak gain, 2.5-2.6 dB noise figure (NF) and 6.6 GHz bandwidth (intersection of 3 dB gain flatness and -10 dB input/output matching), -5.4 dBm third- order input intercept point (IIP3) for a 20.8 mW power dissipa- tion. Modulating the back-gate bias of each stage independently switches the LNA operation mode from a combination of low- noise (0.8 dB variation in NF), high-linearity (~3 dB variation in IIP3) and/or low-power (down to 7.4 mW). Finally, a careful noise contribution analysis of the input matching identifies a 0.58 dB main contribution from the input spiral inductor. EM simulations show that a 0.06 dB improvement in NF can be achieved by using a high-resistivity substrate, if the input inductor design is optimized by stacking several metal layers. Keywords—Low-noise amplifier, FD-SOI CMOS, millimeter- wave, Back-gate bias, 5G, spiral inductor. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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