A real time implementation of interline dynamic voltage restorer for improvement of power quality

Autor:	Alivelu M. Parimi, Ramchandra Nittala
Rok vydání:	2020
Předmět:	Electric power system business.industry Computer science Voltage sag Electrical engineering Network data Power quality Electrical and Electronic Engineering business Voltage source inverter Swell Voltage
Zdroj:	International Journal of Power Electronics. 11:179
ISSN:	1756-6398 1756-638X
DOI:	10.1504/ijpelec.2020.10026821
Popis:	Voltage deviations which occur frequently in the form of voltage sag/swell cause severe disturbances and damage sensitive loads present on the distribution side of power system. One of the feasible solutions to mitigate these voltage sags/swells is by utilising FACTS devices. The FACTS device proposed in this paper is interline dynamic voltage restorer (IDVR) which contains two or more dynamic voltage restorers (DVR) with a common DC link. In this paper, IDVR is designed for a specific application to mitigate power quality problems in an existing real time load. A case study of the load network data of BITS Pilani Hyderabad Campus in Telangana, India which is spread over 200 acres is considered as the real time load. Various multiple voltage sag/swell scenarios are analysed in the real time load. The results have proven that the IDVR can effectively mitigate multiple voltage sags/swells in the considered real time load.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_dedup___::02692c0c8e890f7b6c59c9918a0319c7 https://doi.org/10.1504/ijpelec.2020.10026821 Zobrazit plný text záznamu