A high-density DRAM cell with built-in gain stage
| Autor: | A. Arapoyanni, A. Chrisanthopoulos, Yiorgos Tsiatouhas, G. Kamoulakos |
|---|---|
| Rok vydání: | 2001 |
| Předmět: |
Engineering
business.industry Semiconductor device modeling Topology (electrical circuits) Semiconductor memory Capacitance mos devices Electronic Optical and Magnetic Materials law.invention Capacitor semiconductor memories law Low-power electronics Electronic engineering semiconductor devices Electrical and Electronic Engineering Gain stage business random access memories semiconductor device modeling Dram |
| Zdroj: | IEEE Transactions on Electron Devices. 48:1194-1199 |
| ISSN: | 0018-9383 |
| DOI: | 10.1109/16.925247 |
| Popis: | A high-density DRAM cell is proposed with a built-in vertical gain device topology. Due to the vertical built-in gain device, this cell exhibits increased reading speed, elongated refresh period, low-power oriented operation, and minor layout area penalty. Ieee Transactions on Electron Devices |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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