RANE
| Autor: | Shervin Roshanisefat, Houman Homayoun, Hadi Mardani Kamali, Avesta Sasan |
|---|---|
| Rok vydání: | 2021 |
| Předmět: |
Reverse engineering
Programming language Computer science business.industry 02 engineering and technology computer.software_genre Encryption 020202 computer hardware & architecture Obfuscation (software) Attack model 0202 electrical engineering electronic engineering information engineering Key (cryptography) Verilog 020201 artificial intelligence & image processing Boolean satisfiability problem business computer Formal verification Hardware_LOGICDESIGN computer.programming_language |
| Zdroj: | ACM Great Lakes Symposium on VLSI |
| DOI: | 10.1145/3453688.3461760 |
| Popis: | To enable trust in the IC supply chain, logic locking as an IP protection technique received significant attention in recent years. Over the years, by utilizing Boolean satisfiability (SAT) solver and its derivations, many de-obfuscation attacks have undermined the security of logic locking. Nonetheless, all these attacks receive the inputs (locked circuits) in a very simplified format (Bench or remapped and translated Verilog) with many limitations. This raises the bar for the usage of the existing attacks for modeling and assessing new logic locking techniques, forcing the designers to undergo many troublesome translations and simplifications. This paper introduces the RANE Attack, an open-source CAD-based toolbox for evaluating the security of logic locking mechanisms that implement a unique interface to use formal verification tools without a need for any translation or simplification. The RANE attack not only performs better compared to the existing de-obfuscation attacks, but it can also receive the library-dependent logic-locked circuits with no limitation in written, elaborated, or synthesized standard HDL, such as Verilog. We evaluated the capability/performance of RANE on FOUR case studies, one is the first de-obfuscation attack model on FSM locking solutions (e.g., HARPOON) in which the key is not a static bit-vector but a sequence of input patterns. |
| Databáze: | OpenAIRE |
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