Implementation of super-resolution algorithm on FPGA
| Autor: | Sharayu Hurdale, Prasad D. Khandekar |
|---|---|
| Rok vydání: | 2015 |
| Předmět: |
Computer science
Resolution (electron density) ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION Super resolution algorithm Computational science Image (mathematics) Computer Science::Hardware Architecture Computer graphics (images) Algorithm design Field-programmable gate array MATLAB Image resolution computer Sub-pixel resolution computer.programming_language |
| Zdroj: | 2015 IEEE International Conference on Computational Intelligence and Computing Research (ICCIC). |
| DOI: | 10.1109/iccic.2015.7435757 |
| Popis: | Super resolution technique gives an effective way to increase image resolution. Lower resolution is converted into higher resolution. By proposed super resolution algorithm, image is resolved sixteen times. This paper presents a FPGA (Field Programmable Gate Array) implementation of super resolution algorithm. FPGA is used because of its various advantages. In super resolution image size is increased by adopting information from input image itself. Using this algorithm image can be resolved up-to 2x, 4x, 8x and 16x. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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