Assembly-stress-mechanism in pad areas on high-k/metal gate transistors
Autor: | Kiyomi Hagihara, Takeshi Matsumoto, Yutaka Itoh, Teppei Iwase, Hiroshige Hirano, Kazuhiro Ishikawa, Yukitoshi Ota, Fumito Itoh |
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Rok vydání: | 2010 |
Předmět: |
Materials science
Silicon business.industry Transistor Electrical engineering chemistry.chemical_element Hardware_PERFORMANCEANDRELIABILITY law.invention Stress (mechanics) Mechanism (engineering) chemistry law Hardware_INTEGRATEDCIRCUITS Optoelectronics business Science technology and society Metal gate Flip chip Hardware_LOGICDESIGN High-κ dielectric |
Zdroj: | 2010 Symposium on VLSI Technology. |
DOI: | 10.1109/vlsit.2010.5556189 |
Popis: | We reveal the mechanism of assembly stress in pad areas of flip chip package by using our new local stress evaluation technique in µm resolution. The technique is designed to evaluate the characteristic change of high-k/metal gate transistors (Trs) that are arrayed in µm pitch. |
Databáze: | OpenAIRE |
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