Fast fault simulation for nonlinear analog circuits
| Autor: | N. Engin, H.G. Kerkhoff |
|---|---|
| Rok vydání: | 2003 |
| Předmět: |
Speedup
Analogue electronics Computer science Hardware_PERFORMANCEANDRELIABILITY Fault (power engineering) Matrix decomposition Hardware and Architecture Hardware_INTEGRATEDCIRCUITS Netlist Electronic engineering Transient (oscillation) Electrical and Electronic Engineering Software DC bias Electronic circuit |
| Zdroj: | IEEE Design & Test of Computers. 20:40-47 |
| ISSN: | 0740-7475 |
| Popis: | A new method of transient fault simulation uses dc bias grouping of faulty circuits and decreases the number of Newton-Raphson iterations needed to reach a solution. An experimental tool implementing this method achieves a speedup of 20% to 30% on a flat netlist. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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