High-Level Synthesis
Autor: | Markus Weinhardt, João M. P. Cardoso |
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Rok vydání: | 2016 |
Předmět: |
Source code
Finite-state machine Computer science business.industry Process (engineering) media_common.quotation_subject 0211 other engineering and technologies 02 engineering and technology 020202 computer hardware & architecture Software High-level synthesis Basic block 0202 electrical engineering electronic engineering information engineering Control flow graph Field-programmable gate array Software engineering business Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION 021106 design practice & management media_common |
Zdroj: | FPGAs for Software Programmers ISBN: 9783319264066 FPGAs for Software Programmers |
Popis: | The compilation of high-level languages, such as software programming languages, to FPGAs is of paramount importance for the mainstream adoption of FPGAs. An efficient compilation process will improve designer productivity and will make the use of FPGA technology viable for software programmers. When targeting the hardware resources provided by FPGAs, a compilation process usually requires a stage known as High-Level Synthesis (HLS) which is responsible for generating application specific hardware architectures from the input source code or from an intermediate representation of the input application. This chapter briefly describes HLS and its main processing stages. The chapter provides the indispensable knowledge for readers who want to follow the remaining chapters of this book. |
Databáze: | OpenAIRE |
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