A Neural Network Prefetcher for Arbitrary Memory Access Patterns
| Autor: | Leeor Peled, Yoav Etsion, Uri Weiser |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
010302 applied physics
Instruction prefetch Hardware_MEMORYSTRUCTURES Speedup Artificial neural network business.industry Computer science Locality Context (language use) 02 engineering and technology Machine learning computer.software_genre 01 natural sciences 020202 computer hardware & architecture Hardware and Architecture Pointer (computer programming) 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Code (cryptography) Artificial intelligence business computer Software Graph500 Information Systems |
| Zdroj: | ACM Transactions on Architecture and Code Optimization. 16:1-27 |
| ISSN: | 1544-3973 1544-3566 |
| DOI: | 10.1145/3345000 |
| Popis: | Memory prefetchers are designed to identify and prefetch specific access patterns, including spatiotemporal locality (e.g., strides, streams), recurring patterns (e.g., varying strides, temporal correlation), and specific irregular patterns (e.g., pointer chasing, index dereferencing). However, existing prefetchers can only target premeditated patterns and relations they were designed to handle and are unable to capture access patterns in which they do not specialize. In this article, we propose a context-based neural network (NN) prefetcher that dynamically adapts to arbitrary memory access patterns. Leveraging recent advances in machine learning, the proposed NN prefetcher correlates program and machine contextual information with memory accesses patterns, using online-training to identify and dynamically adapt to unique access patterns exhibited by the code. By targeting semantic locality in this manner, the prefetcher can discern the useful context attributes and learn to predict previously undetected access patterns, even within noisy memory access streams. We further present an architectural implementation of our NN prefetcher, explore its power, energy, and area limitations, and propose several optimizations. We evaluate the neural network prefetcher over SPEC2006, Graph500, and several microbenchmarks and show that the prefetcher can deliver an average speedup of 21.3% for SPEC2006 (up to 2.3×) and up to 4.4× on kernels over a baseline of PC-based stride prefetcher and 30% for SPEC2006 over a baseline with no prefetching. |
| Databáze: | OpenAIRE |
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