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Verification plays a major role in the implementation of soc and it is as important as designing. verification gives with the actual enactment and functionality of a DUT and verifies if it meets the specification or not. This paper presents an AMBA 3 AHB_LITE protocol has been justified as per the specifications by using UVM environment which completely wraps the DUT The verification environment is developed with the test bench components like the test, environment, agent, driver, sequencer, monitor, and scoreboard. The created environment is used for testing the complete AHB-LITE protocol directed and non-directed (both increment and wrap of different burst sizes like 4-, 8-, 16-beat bursts) transfer, single and undefined length burst and with waited transfer responses. The verification exercises to verify the protocol, in this paper it is based on having single bus master and a slave model which communicate with each other on the AHB-LITE bus. |
