A Time-based Leakage-aware Algorithm for Task Placement and Scheduling Problem on Dynamic Reconfigurable FPGA
| Autor: | Tingyu Zhou, Zhiguo Bao, Tieyuan Pan, Takahiro Watanabe |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
Job shop scheduling
Computer science Transistor 0211 other engineering and technologies Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Integrated circuit Chip 020202 computer hardware & architecture law.invention Scheduling (computing) Gate array law Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Field-programmable gate array Algorithm Hardware_LOGICDESIGN 021106 design practice & management Leakage (electronics) |
| Zdroj: | ICSAI |
| DOI: | 10.1109/icsai.2018.8599330 |
| Popis: | Field-programmable gate array (FPGA) has enormous potential in the field of Integrated Circuit (IC) due to its programmability, short design cycle, and high flexibility in parallel computing. Nevertheless, increasing chip integration and shrinking transistor size lead to non-negligible power dissipation in FPGA. Specifically, leakage power dissipation issue as a crucial part of power consumption in FPGA requires being concerned urgently. In this paper, a time-based leakage-power aware algorithm (TBLA) is proposed to address the aforementioned issue on 2D dynamic partial reconfigurable FPGA. Experimental results show that the proposed TBLA algorithm reduces the leakage-power and scheduling overhead without increasing the overall execution time of an application compared to traditional algorithms. |
| Databáze: | OpenAIRE |
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