| Autor: |
D. Pantelakis, Hung-Szu Lin, K. Kawakamr, P. Kliza, Kishan Pradhan, Shu-Fen Chang, Jason Li, Masaaki Higashitani, Sridhar Yadala, Feng Pan, Jong Park, Jayson Hu, Junhui Yang, Takumi Abe, Yan Li, Khin Htoo, Khanh Nguyen, Farookh Moogat, Fanglin Zhang, Binh Quang Le, V. Sakhamuri, Raul-Adrian Cernea, Siu Chan, H. Mukai, H. Nasu, Cynthia Hsu, Khandker N. Quader, Tai-Yuan Tseng, Yasuyuki Fukuda, Yingda Dong, Shouchang Tsao, Subodh Taigor, Long Pham, Jeffrey W. Lutze, James Chan, A. Li, T. Ip, Teruhiko Kamei, James Lan, J. Lakshmipathi, C. Liang, Mehrdad Mofidi, Sharon Huynh |
| Rok vydání: |
2008 |
| Předmět: |
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| Zdroj: |
ISSCC |
| Popis: |
In the diverse world of NAND flash applications, higher storage capacity is not the only imperative. Increasingly, performance is a differentiating factor and is also a way of creating new markets or expanding existing markets. While conventional memory uses, for actual operations, every other cell along a selected word line (WL) (Takeuchi, 2006), this design simultaneously exercises them all. A performance improvement of at least 100% is derived from this all-bitline (ABL) architecture relative to conventional chips. Additional techniques push performance to even higher levels. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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