Synthesis of an Application Specific Instruction Set Processor (ASIP) for RIPEMD-160 Hash Algorithm
| Autor: | Yavar Safaei Mehrabani |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
Assembly language
Computer Networks and Communications Computer science business.industry RIPEMD 020208 electrical & electronic engineering Application-specific instruction-set processor Hash function 020206 networking & telecommunications 02 engineering and technology Electronic Optical and Magnetic Materials Instruction set Application-specific integrated circuit Computer architecture VHDL 0202 electrical engineering electronic engineering information engineering Hardware_CONTROLSTRUCTURESANDMICROPROGRAMMING Electrical and Electronic Engineering business Instrumentation computer Digital signal processing computer.programming_language |
| Zdroj: | International Journal of Electronics Letters. 7:154-165 |
| ISSN: | 2168-1732 2168-1724 |
| Popis: | Hash functions are vital tasks in many applications such as digital fingerprinting, Internet communications, bank transactions and so forth. RACE Integrity Primitives Evaluation Message Digest-160 (RIPEMD-160) is one of the most applicable hash functions that there have been several structures for designing it based on Application-Specific Integrated Circuit (ASIC) approach in the literature. Application-Specific Instruction Set Processor (ASIP) design makes compromise between ASIC and Digital Signal Processing approaches with respect to speed, cost and flexibility. Because of this unique property of ASIP method, an ASIP processor for RIPEMD-160 hash algorithm is presented in this article for the first time. A special Register Configuration (RC) for RIPEMD-160 hash algorithm is developed which its Instruction Set Architecture (ISA) includes 12 specific and 35 general instructions. Proposed ASIP is simulated with VHDL language in the behavioural level of abstraction, and a typical assembly code is ... |
| Databáze: | OpenAIRE |
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