Aspects on Timing Modeling of Radiation-Hardness by Design Standard Cell-Based △TMR Flip-Flops

Autor:	Anselm Breitenereiter, Milos Krstic, Steffen Zeidler, Oliver Schrape
Rok vydání:	2019
Předmět:	Triple modular redundancy Computer science business.industry Logic gate Datapath Design flow Redundancy (engineering) Hardware_PERFORMANCEANDRELIABILITY FLOPS business Radiation hardening Computer hardware Cell based
Zdroj:	DSD
DOI:	10.1109/dsd.2019.00100
Popis:	The paper presents and discusses the timing modeling approach for digital Radiation-Hardness by Design (RHBD) ΔTMR flip-flops. The basic fault-tolerant Triple Modular Redundancy (TMR) flip-flop architecture and the Single Event Transient-tolerant variant for the datapath (ΔTMR) are briefly introduced. The main focus is set on proper timing library modeling and timing check characterization respectively, as these are required in the digital design flow. The analyses are made with usage of a 130nm high performance BiCMOS technology node as a case study for the paper.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::fac6fd0d1c6316332bc68f9bbffdb676 https://doi.org/10.1109/dsd.2019.00100 Zobrazit plný text záznamu