Area-Efficient D-Flip Flop and XOR in QCA
| Autor: | Lakshminarayanan Gopalakrishnan, Raja Sekar Kumaresan, Marshal Raj |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
020203 distributed computing
business.industry Computer science 02 engineering and technology 021001 nanoscience & nanotechnology FLOPS Multiplexer Cellular automaton law.invention XNOR gate law 0202 electrical engineering electronic engineering information engineering Cell structure Hardware_ARITHMETICANDLOGICSTRUCTURES 0210 nano-technology business Realization (systems) Flip-flop Computer hardware Hardware_LOGICDESIGN |
| Zdroj: | ICCCNT |
| DOI: | 10.1109/icccnt49239.2020.9225372 |
| Popis: | Exclusive-Or (XOR) and D-Flip Flop (D-FF) are used in different digital applications. In this work, area efficient designs of XOR and D-FF are proposed and realized in Quantum-dot Cellular Automata. In addition to that, an Exclusive-NOR (XNOR) gate is also proposed. The D-FF is realized by using a novel multiplexer. 4-dot 2-electron cell structure is used for the realization. The proposed designs have fewer cells and consume a smaller area compared to other designs. The proposed XOR and XNOR have the least cells, delay and area compared to other designs. The designs are verified in QCADesigner. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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