GAD: A 12-GS/s CMOS 4-bit A/D converter for an equalized multi-level link

Autor: Chih-Kong Ken Yang, W. Ellersick, Mark Horowitz, William J. Dally
Rok vydání: 2003
Předmět:
Zdroj: 1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326).
DOI: 10.1109/vlsic.1999.797232
Popis: A 4-bit 12-GSample/sec A/D converter (GAD) has been fabricated in a 0.25-/spl mu/m CMOS process to investigate the design of an equalized multi-level link. Clocked differential amplifiers were used to sample the input, followed by high-speed comparators with current-summed offset cancellation. Input bandwidth was measured at 2.5 GHz. Eight 1.5-GSample/sec flash A/D converters were interleaved to achieve the aggregate sample rate.
Databáze: OpenAIRE