Mirror Full Adder SET Susceptibility on 7nm FinFET Technology
Autor: | Ricardo Reis, Rafael N. M. Oliveira, Cristina Meinhardt, Fabio G. Rossato G. da Silva |
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Rok vydání: | 2020 |
Předmět: |
010302 applied physics
Adder Computer science 020208 electrical & electronic engineering Word error rate Topology (electrical circuits) 02 engineering and technology Function (mathematics) Interference (wave propagation) Topology 01 natural sciences Set (abstract data type) Robustness (computer science) 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Node (circuits) |
Zdroj: | ICECS |
Popis: | This work investigates the Mirror full adder circuit using a 7nm FinFET technology, considering the SET susceptibility and the robustness of all internal nodes of the circuit. This work aims to identify how this full adder topology behaves in a specific environment, observing the charge collected at each internal node. The devices involved in the processing of the carry-out function shown to be more robust than the Sum circuit and also presented a lower error rate. Furthermore, the input vector 000 proved to be the most critical one, among the input combinations, and the results show a dependence of the type of pulse in the generation of errors in the Mirror full adder. |
Databáze: | OpenAIRE |
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