A low-power hybrid reconfigurable architecture for resistive random-access memories
| Autor: | Miguel Angel Lastras-Montano, Amirali Ghofrani, Kwang-Ting Cheng |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
010302 applied physics
Hardware_MEMORYSTRUCTURES business.industry Computer science Sense amplifier Registered memory Semiconductor memory 02 engineering and technology 021001 nanoscience & nanotechnology 01 natural sciences Embedded system 0103 physical sciences Memory architecture Electronic engineering Interleaved memory Non-volatile random-access memory Memory refresh 0210 nano-technology business Computer memory |
| Zdroj: | HPCA |
| DOI: | 10.1109/hpca.2016.7446057 |
| Popis: | Access-transistor-free memristive crossbars have shown to be excellent candidates for next generation non-volatile memories. While the elimination of the transistor per memory element enables higher memory densities, it also introduces parasitic currents during the normal operation of the memory that increases both the overall power consumption of the crossbar, and the current requirements of the line drivers. In this work we present a hybrid reconfigurable memory architecture that takes advantage of the fact that a complementary resistive switch (CRS) can behave both as a memristor and as a CRS. By dynamically keeping frequently accessed regions of the memory in the memristive mode and others in the CRS mode, our hybrid memory offer all the benefits that a memristor and a CRS offer individually, without any of their drawbacks. We validate our architecture using the SPEC CPU2006 benchmark and found that our hybrid memory offers average energy savings of 3.6x with respect to a memristive-only memory. In addition, we can offer a memory lifetime that is, on average, 6.4x longer than that of a CRS-only memory. |
| Databáze: | OpenAIRE |
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