A Study of BER-Optimal ADC-Based Receiver for Serial Links
| Autor: | Naresh R. Shanbhag, Yingyan Lin, Min-Sun Keel, Andrew C. Singer, Aolin Xu, Elyse Rosenbaum, Adam C. Faust |
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| Rok vydání: | 2016 |
| Předmět: |
Serial communication
Computer science 020208 electrical & electronic engineering Analog-to-digital converter 020206 networking & telecommunications Mixed-signal integrated circuit 02 engineering and technology law.invention Effective number of bits Signal-to-noise ratio law Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering Bit error rate Overhead (computing) Electrical and Electronic Engineering Throughput (business) |
| Zdroj: | IEEE Transactions on Circuits and Systems I: Regular Papers. 63:693-704 |
| ISSN: | 1558-0806 1549-8328 |
| DOI: | 10.1109/tcsi.2016.2529284 |
| Popis: | Analog-to-digital converter (ADC)-based multi-Gb/s serial link receivers have gained increasing attention in the backplane community due to the desire for higher I/O throughput, ease of design portability, and flexibility. However, the power dissipation in such receivers is dominated by the ADC. ADCs in serial links employ signal-to-noise-and-distortion ratio (SNDR) and effective-number-of-bit (ENOB) as performance metrics as these are the standard for generic ADC design. This paper studies the use of information-based metrics such as bit-error-rate (BER) to design a BER-optimal ADC (BOA) for serial links. Channel parameters such as the $m$ -clustering value and the threshold non-uniformity metric $h_{t}$ are introduced and employed to quantify the BER improvement achieved by a BOA over a conventional uniform ADC (CUA) in a receiver. Analytical expressions for BER improvement are derived and validated through simulations. A prototype BOA is designed, fabricated and tested in a 1.2 V, 90 nm LP CMOS process to verify the results of this study. BOA's variable-threshold and variable-resolution configurations are implemented via an 8-bit single-core, multiple-output passive digital-to-analog converter (DAC), which incurs an additional power overhead of $ 0.1% (approximately 50 $\mu\text{W}$ ). Measurement results show examples in which the BER achieved by the 3-bit BOA receiver is lower by a factor of $10^{9}$ and $10^{10}$ , as compared to the 4-bit and 3-bit CUA receivers, respectively, at a data rate of 4-Gb/s and a transmitted signal amplitude of 180 mVppd. |
| Databáze: | OpenAIRE |
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