Straddle gate transistors: high I/sub on//I/sub off/ transistors at short gate lengths
| Autor: | S. Cohen, Sandip Tiwari, Ajay Kumar, J.J. Welser |
|---|---|
| Rok vydání: | 2003 |
| Předmět: |
Materials science
business.industry Transistor Gate dielectric Electrical engineering Conductance Drain-induced barrier lowering Hardware_PERFORMANCEANDRELIABILITY Condensed Matter::Mesoscopic Systems and Quantum Hall Effect law.invention Computer Science::Hardware Architecture Computer Science::Emerging Technologies Gate oxide law Modulation MOSFET Hardware_INTEGRATEDCIRCUITS Optoelectronics business Hardware_LOGICDESIGN Voltage |
| Zdroj: | 1999 57th Annual Device Research Conference Digest (Cat. No.99TH8393). |
| Popis: | Straddle gate transistors are structures where the source/drain doped extension regions of a transistor are separated from the transistor control region through a low threshold-voltage side-wall which turns on before the transistor, and provides high conductance injection. By providing for gate modulation of this region, the transistor has effectively a longer channel length when it is off and shorter channel length when it is on. We show, experimentally and theoretically, how this leads to lower off currents, higher I/sub on//I/sub off/ ratios and a path to smaller devices that are not limited by the constraints of shallow doping extensions. |
| Databáze: | OpenAIRE |
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