Integrated Deep Trench Capacitor in Si Interposer for CoWoS Heterogeneous Integration
| Autor: | Chung-Cheng Wu, T.H. Yu, Kai-Yuan Ting, Fang-Cheng Chen, C. T. Wang, C.H. Tsai, Douglas Yu, Shang-Yun Hou, Y.W. Lee, H. Hsia, W. C. Chiou |
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| Rok vydání: | 2019 |
| Předmět: |
010302 applied physics
Materials science Dielectric strength Through-silicon via business.industry 020208 electrical & electronic engineering Power integrity Time-dependent gate oxide breakdown 02 engineering and technology 01 natural sciences Capacitance Die (integrated circuit) law.invention Capacitor law 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Interposer Optoelectronics business |
| Zdroj: | 2019 IEEE International Electron Devices Meeting (IEDM). |
| Popis: | To accommodate the exceedingly demanding power integrity (PI) requirements for the advanced artificial intelligence (AI) and high performance computing (HPC) components, high-K (HK) based deep trench capacitors (DTC) have been integrated the first time in the silicon interposer with through silicon via (TSV) and fine-pitch interconnects for chip-on-wafer-on-substrate (CoWoS) integration. A specific capacitance density (C s ) of up to 340 nF/mm2 is achieved over a large capacitor array, providing a total capacitance (C t ) of up to 68 μF per interposer die. The HK dielectric has intrinsic time-dependent dielectric breakdown (TDDB) lifetime of > 1,000 years at an operation voltage (V cc ) of 1.35V, and a normalized leakage current (I LK ) density LK & V bd tailing) were observed. The high capacitance, low leakage, large area and reliability-proven Si-interposer integrated DTC, or iCap, provides superior PI performance and therefore greatly enhances the merit of using CoWoS for the next-generation heterogeneous wafer level system integration (WLSI). |
| Databáze: | OpenAIRE |
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