Design of high-speed RCA based 2-D bypassing multiplier for fir filter
| Autor: | Thiruvenkadam Krishnan, Anjali S. Pillai, Parthibaraj Anguraj, S. Saravanan |
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| Rok vydání: | 2020 |
| Předmět: |
010302 applied physics
Divide and conquer algorithms Adder Finite impulse response Computer science 02 engineering and technology General Medicine 021001 nanoscience & nanotechnology Operand 01 natural sciences Multiplexer Multiplier (Fourier analysis) 0103 physical sciences Hardware_ARITHMETICANDLOGICSTRUCTURES Arithmetic 0210 nano-technology Row AND gate |
| Zdroj: | Materials Today: Proceedings. 33:3692-3696 |
| ISSN: | 2214-7853 |
| DOI: | 10.1016/j.matpr.2020.05.803 |
| Popis: | Multiplication is essential arithmetic operations for the filter. In this paper, high-speed area-efficient RCA based 2-D bypassing multiplier proposed for finite-impulse response (FIR) filter implementation. Conventional CSA based 2-D bypassing multiplier provides low power in comparison with array multiplier because the number of signal transitions is reduced when the horizontal (rows) and vertical (columns) operands are zero. But the area is increased due to the additional adder and logic cells (multiplexer) used for bypassing technique. The proposed RCA based 2-D bypassing multiplier eliminates the carry multiplexer in all logic cells. Due to this the area has reduced when compared to the conventional CSA based 2-D bypassing multiplier, at the same time the proposed architecture is designed using Divide and Conquer method, so the delay also reduced for the proposed multiplier. |
| Databáze: | OpenAIRE |
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