High performance Hi-K + metal gate strain enhanced transistors on (110) silicon

Autor:	Cory E. Weber, K. Kuhn, K. Zawadzki, Paul A. Packan, Roza Kotlyar, Tahir Ghani, Martin D. Giles, S. Cea, Pushkar Ranade, H. Deshpande, Oleg Golonzka, Anand Portland Murthy, Lucian Shifren, Michael L. Hattendorf
Rok vydání:	2008
Předmět:	Materials science Silicon business.industry Transistor Electrical engineering chemistry.chemical_element PMOS logic law.invention chemistry law Logic gate MOSFET Optoelectronics Node (circuits) business Metal gate NMOS logic
Zdroj:	2008 IEEE International Electron Devices Meeting.
Popis:	For the first time, the performance impact of (110) silicon substrates on high-k + metal gate strained 45 nm node NMOS and PMOS devices is presented. Record PMOS drive currents of 1.2 mA/um at 1.0 V and 100 nA/um Ioff are reported. It will be demonstrated that 2D short channel effects strongly mitigate the negative impact of (110) substrates on NMOS performance. Narrow width (110) device performance is shown and compared to (100) for the first time. Device reliability is also reported showing no fundamental issue for (110) substrates.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::f40002517250d370b222f42069220eed https://doi.org/10.1109/iedm.2008.4796614 Zobrazit plný text záznamu