Latches and Flip-Flops

Autor:	Dhanasekharan Natarajan
Rok vydání:	2020
Předmět:	Sequential logic business.industry Hold time Computer science Flip Hardware_INTEGRATEDCIRCUITS Hardware_PERFORMANCEANDRELIABILITY Hardware_ARITHMETICANDLOGICSTRUCTURES business FLOPS Computer hardware Hardware_LOGICDESIGN
Zdroj:	Lecture Notes in Electrical Engineering ISBN: 9783030361952
DOI:	10.1007/978-3-030-36196-9_8
Popis:	Latches and flip-flops are basic sequential logic devices. The operation of SR and D latches are presented. The application SR latch for eliminating contact bounces in mechanical switches is explained. The operation of D, T and JK flip-flops is explained. Flip-flops using Master-Slave latches are also explained. Set-up time and hold time are the timing requirements of flip-flops. The timing requirements of flip-flop are defined and the method of measuring them is presented.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::f3c5fc6c2789fa295711259f4385de7d https://doi.org/10.1007/978-3-030-36196-9_8 Zobrazit plný text záznamu