Circuit Modeling for RRAM-Based Neuromorphic Chip Crossbar Array With and Without Write-Verify Scheme
| Autor: | Aili Wang, Manareldeen Ahmed, Tuomin Tao, Er-Ping Li, Hang Jin, Shurun Tan, Hanzhi Ma, En-Xiao Liu, Quankun Chen, Zheming Gu |
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| Rok vydání: | 2021 |
| Předmět: |
Scheme (programming language)
Neuromorphic engineering Robustness (computer science) Computer science Process (computing) Electronic engineering Domain decomposition methods Electrical and Electronic Engineering Chip computer MNIST database Resistive random-access memory computer.programming_language |
| Zdroj: | IEEE Transactions on Circuits and Systems I: Regular Papers. 68:1906-1916 |
| ISSN: | 1558-0806 1549-8328 |
| DOI: | 10.1109/tcsi.2021.3060798 |
| Popis: | This article presents a novel circuit modeling method for online training and testing process of the neuromorphic chip crossbar array based on the resistive random access memory (RRAM). A modified RRAM compact model is developed to realize the fast and accurate update of multiple conductance levels. Two training mechanisms with and without write-verify scheme are modeled and investigated for classifying MNIST handwritten digits and both achieve a good recognition accuracy of more than 96%. The parasitic model of the unit cell of interconnects is constructed by the domain decomposition method (DDM) and the partial equivalent element circuit (PEEC) method, which is suitable to build up a crossbar array of any size. The impact of parasitic effects of interconnects on the recognition accuracy with and without write-verify scheme is analyzed and compared. The weights trained with write-verify scheme show better robustness to parasitic noises but training with write-verify scheme spends a longer time processing the same amount of data. |
| Databáze: | OpenAIRE |
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