Structured ASIC: Methodology and comparison
| Autor: | Kong-Pang Pun, Steve C. L. Yuen, Philip H. W. Leong, Yan-Qing Ai, Oliver C. S. Choy, Thomas C. P. Chau, Sam M. H. Ho, Hiu Ching Poon |
|---|---|
| Rok vydání: | 2010 |
| Předmět: |
Computer science
business.industry Controller (computing) Process (computing) Integrated circuit design CMOS Mask set Application-specific integrated circuit Logic gate Embedded system Hardware_INTEGRATEDCIRCUITS Hardware_ARITHMETICANDLOGICSTRUCTURES business Field-programmable gate array Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION Hardware_LOGICDESIGN |
| Zdroj: | FPT |
| DOI: | 10.1109/fpt.2010.5681422 |
| Popis: | As fabrication process technology continues to advance, mask set costs have become prohibitively expensive. Structured ASICs can offer price and performance between ASICs and FPGAs. They are attractive for mid-volume production and offer good intellectual property security. In this paper, a structured ASIC methodology, where 2 metal- and 1 via-mask are customised, is described. The CAD tools are fully compatible with conventional ASIC design flows and a comparison of area and delay performance with ASICs and FPGAs is given. A prototype structured ASIC implementing an LED-backlit LCD controller was fabricated in a 0.13µm CMOS process. It was verified and power consumption compared with an ASIC design. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|