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As microelectronics technology enters the deep-submicron arena, fully depleted SOI (FDSOI) technology assumes a prominent position as a potential solution to the problems associated with continued device scaling. Some of the possible benefits of using FDSOI are improved control of the transistor threshold voltage, lower junction capacitance, higher device packing density, and latchup immunity (Maiti et al, 1998). Fully depleted SOI devices with a metal gate (MGFDSOI) offer the additional benefits of eliminating polysilicon depletion, allowing thinner electrical gate dielectric thickness for the same physical thickness along with reduced gate sheet resistance (Colinge, 1997). For FDSOI structures with ultrathin ( |
