A 50-mW 14-bit 2.5-MS/s Σ-Δ modulator in a 0.25 μm digital CMOS technology

Autor:	P. Balmelli, F. Piazza, Qiuting Huang
Rok vydání:	2002
Předmět:	Physics business.industry Dynamic range Bandwidth (signal processing) Electrical engineering Noise shaping law.invention Capacitor Signal-to-noise ratio CMOS Delta modulation law Oversampling business
Zdroj:	2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103).
Popis:	A 5/sup th/-order single-loop /spl Sigma/-/spl Delta/ modulator has been implemented in a 0.25 /spl mu/m digital CMOS process, where the supply voltage is only 2.5 V and the capacitor option is not available. A tri-level quantizer is used to improve loop stability. The sampling frequency of the modulator is 80 MHz and the oversampling ratio is 32. Measured over a 1 MHz signal bandwidth, dynamic range is 86 dB, peak SNR is 80 dB and peak SNDR is 78 dB. The modulator consumes only 50 mW.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::f16276a4512ce27dc16d9d44d193c50a https://doi.org/10.1109/vlsic.2000.852873 Zobrazit plný text záznamu