Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory Devices
| Autor: | Tiao-Yuan Huang, Cheng-Wei Luo, Hsing-Hui Hsu, Horng-Chih Lin, Ko-Hui Lee, Wei-Chen Chen |
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| Rok vydání: | 2011 |
| Předmět: |
Materials science
Silicon business.industry Oxide Nanowire chemistry.chemical_element Integrated circuit Nitride Electronic Optical and Magnetic Materials law.invention Non-volatile memory chemistry.chemical_compound chemistry Nanocrystal law Electronic engineering Optoelectronics Electrical and Electronic Engineering business Layer (electronics) |
| Zdroj: | IEEE Transactions on Electron Devices. 58:1879-1885 |
| ISSN: | 1557-9646 0018-9383 |
| DOI: | 10.1109/ted.2011.2140321 |
| Popis: | Trap-layer-engineered poly-Si nanowire silicon-oxide-nitride-oxide-silicon (SONOS) devices with a gate-all-around (GAA) configuration were fabricated and characterized. For the first time, a clever method has been developed to flexibly incorporate Si-nanocrystal (NC) dots in different locations in the nitride layer. Three types of poly-Si GAA SONOS devices with Si-NC dots embedded in the block oxide/nitride interface, the middle of the nitride, and the nitride/tunnel oxide interface, respectively, by in situ deposition were fabricated and investigated in this paper. Our results indicate that the optimal NC location appears to be somewhere between the middle and bottom interfaces of the nitride layer. |
| Databáze: | OpenAIRE |
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