Power capability limits of power MOSFET devices
| Autor: | Young Sir Chung, Bob Baird |
|---|---|
| Rok vydání: | 2002 |
| Předmět: |
LDMOS
Engineering Switched-mode power supply business.industry Electrical engineering Semiconductor device Condensed Matter Physics Atomic and Molecular Physics and Optics Surfaces Coatings and Films Electronic Optical and Magnetic Materials Snapback Power module Hardware_INTEGRATEDCIRCUITS Electronic engineering Junction temperature Power semiconductor device Electrical and Electronic Engineering Power MOSFET Safety Risk Reliability and Quality business |
| Zdroj: | Microelectronics Reliability. 42:211-218 |
| ISSN: | 0026-2714 |
| Popis: | With technology progression, power capability becomes a more critical concern in optimizing power device designs in various smart power IC applications. Interaction between the electrical and thermal entities is essential in understanding the power capability limit of the semiconductor devices in both transient and steady-state operations. This paper reports the fundamental mechanisms of the electrical–thermal coupling process during power dissipation and the characteristics of the power capability limits of the power MOSFET devices from the scope of intrinsic and extrinsic factors that affect the power capability. An electrothermally driven snapback breakdown is discussed in detail to investigate the physical mechanism of the power capability limits of an LDMOS power transistor. Both simulation and experimental results are in good agreement, indicating that the electrothermal snapback breakdown would occur at lower junction temperature than the intrinsic junction temperature. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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