A 7ns/350mW 64K ECL compatible RAM
Autor: | Hisayuki Higuchi, Shuuichi Miyaoka, Suzuki Makoto, T. Ikeda, Masanori Odaka, Katsumi Ogiue, Mitsuru Hirao |
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Rok vydání: | 2005 |
Předmět: | |
Zdroj: | 1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. |
Popis: | A 64K×1 ECL RAM using 1.3μm bipolar-CMOS technology including bipolar transistor with a 7GHz cutoff frequency will be presented. Variable impedance and equalizing circuitry permit 7ns access time. Power dissipation is 350mW. |
Databáze: | OpenAIRE |
Externí odkaz: |