| Popis: |
In this paper a non‐damaging and non‐contaminating method for performing Capacitance‐Voltage (CV) and Current‐Voltage (IV) electrical characterization of advanced gate dielectrics and stack capacitor films is presented. The method uses a contacting Elastic Material Probe (EM‐Probe) that is made of a semiconductor compatible material and forms a gate contact diameter of about 30 to 50 microns. Key electrical parameters that are measured are, Capacitive Effective Thickness (CET), Equivalent Oxide Thickness (EOT), Interface Trap Density (Dit), delta VFB Hysteresis (ΔVFB), leakage current density (JLK), Field‐to‐breakdown (FBD), Charge‐to‐breakdown (QBD) and Stress Induced Leakage Current (SILC). Measurements can be made on either blanket or in scribe line test areas in patterned wafers. |
