| Popis: |
In the paper, four existing commonly referred master slave single-edge-triggered storage designs are analyzed. A detailed comparison of the designs is presented in this work on the basis of speed, power, transistor count and PDP. Due to continuous scaling of transistors and increasing requirement of portable equipment, power reduction is of main concern. For design of sequential circuits, flip-flops play very important role. All simulations of flip-flops are done using T-Spice in 32nm technology. Among all flip-flops compared, HPFF is best suited for low power applications and FFIP is best suited for high speed applications. |
