Design of ITT 525 'VADE' real-time processor

Autor: E. E. Barrett, F. O. Williams, R. Hayum, D. R. Helman
Rok vydání: 1962
Předmět:
Zdroj: AFIPS Fall Joint Computing Conference
DOI: 10.1145/1461518.1461534
Popis: The ITT 525 VADE (Versatile Automatic Data Exchange) is a medium-scale communications processor capable of handling 128 duplexed teletype lines and 16 high speed data lines. The processor is of the single-address, parallel binary type utilizing a two-microsecond-cycle-time core memory and operating at a single-phase clock rate of four megacycles. The fundamental design approach of the machine is to trade the intrinsic speed of high performance hardware for a reduction in total equipment, through time-sharing. The memory is shared between stored program and input/output functions without the use of a complicated "interrupt" feature. Serial data transfers between the memory and communication lines are performed on a "bit-at-a-time" basis requiring a minimum of per-line buffering. The central processor hardware is largely conventional but has been reduced as much as possible without impairing the power of a basic communications processing instruction repertoire--which includes indexing and character mode operations but not, as yet, multiplication or division. Instruction time is six microseconds and the number of instructions performed per second varies from 63,500 to 81,000 depending on the existing input/output traffic load. Duplexing of the machine is accomplished by a "shadow" system whereby the off-line processor is continuously updated by the on-line processor through one of the normal high speed data links.
Databáze: OpenAIRE