A 0.6-V VDD W-Band Neutralized Differential Low Noise Amplifier in 28-nm Bulk CMOS
Autor: | Jia Zhou, Rulin Huang, Yen-Cheng Kuan, Chiang Ching-Wen, Kuei-Ann Wen, Chia-Jen Liang, Mau-Chung Frank Chang |
---|---|
Rok vydání: | 2021 |
Předmět: |
Power gain
Physics business.industry 020206 networking & telecommunications Topology (electrical circuits) 02 engineering and technology Condensed Matter Physics Noise figure Low-noise amplifier law.invention CMOS W band law 0202 electrical engineering electronic engineering information engineering Optoelectronics Electrical and Electronic Engineering Resistor business Miller effect |
Zdroj: | IEEE Microwave and Wireless Components Letters. 31:481-484 |
ISSN: | 1558-1764 1531-1309 |
Popis: | This letter presents a ${W}$ -band low-power and high-gain differential low noise amplifier (LNA) fabricated in 28-nm bulk CMOS technology. This LNA operates at a 0.6-V supply voltage ( ${V} _{\mathbf {DD}}$ ) to achieve low power consumption and respond to the low-voltage regime anticipated in future CMOS technology nodes. To obtain sufficient voltage headroom and mitigate the Miller effect, this LNA employs neutralized common source (CS) instead of cascode topology in each stage. The common-mode instability introduced by CS neutralization is reduced by making the secondary coil of each transformer (except the final one) center-tapped with resistors. The stability factor (K) and measure (B1) at a single-stage common mode are improved from 0.59 to 126 and from −0.14 to 0.6, respectively. In addition, each stage of this LNA uses only one transformer for conjugate matching, without any capacitor to minimize the passive loss. This LNA consists of five stages and achieves a power gain of 25 dB over 81–91 GHz (BW3dB) and a minimum noise figure (NF) of 6 dB at 85 GHz with power consumption of 15 mW and a silicon core area of 0.19 mm2. |
Databáze: | OpenAIRE |
Externí odkaz: |