Exploring Digital Logic Design Using Ballistic Deflection Transistors Through Monte Carlo Simulations
| Autor: | Javier Mateos, Paul Ampadu, Sohan Purohit, V. Kaushal, Tomas Gonzalez, Ignacio Iniguez-de-la-Torre, Mufei Gong, Martin Margala, Roman Sobolewski, David Wolpert |
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| Rok vydání: | 2011 |
| Předmět: |
Engineering
business.industry Circuit design Transistor Monte Carlo method Control reconfiguration Hardware_PERFORMANCEANDRELIABILITY Computer Science Applications law.invention Computer Science::Hardware Architecture Computer Science::Emerging Technologies Logic synthesis law Deflection (engineering) Ballistic conduction Logic gate Hardware_INTEGRATEDCIRCUITS Electronic engineering Electrical and Electronic Engineering business Simulation Hardware_LOGICDESIGN |
| Zdroj: | IEEE Transactions on Nanotechnology. 10:1337-1346 |
| ISSN: | 1941-0085 1536-125X |
| DOI: | 10.1109/tnano.2011.2142321 |
| Popis: | We present exploratory studies of digital circuit design using the recently proposed ballistic deflection transistor (BDT) devices. We demonstrate a variety of possible logic functions through simple reconfiguration of two drain-connected BDTs. We further propose the creation of a three-BDT logic cell to yield differential versions of each logic function, improving overall flexibility of BDT circuit design. Each of the proposed gate configurations has been verified through extensive numerical calculations using an in-house Monte Carlo simulator. Simulation results show that the proposed gate arrangements are capable of achieving 400-GHz operating frequencies at room temperature. A compact fit-based analytical model to aid circuit design using BDTs is also introduced. |
| Databáze: | OpenAIRE |
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