Autor: |
Masatoshi Kohno, Yuri Terada, T. Kobayashi, Jumpei Sato, Akihiro Imamoto, Koji Kato, Tomoharu Hashiguchi, Yuki Shimizu, Yoshihisa Watanabe, Fumihiro Kono, Masashi Yamaoka, Yoshinao Suzuki, Ryuji Yamashita, Masami Masuda, Hayato Konno, Mai Muramoto, Tomofumi Fujimura, Masaki Fujiu, Mitsuaki Honma, Takuya Okanaga, Xiaoqing Wang, Mario Sako, Michio Nakagawa, Kazuyoshi Muraoka, Takao Nakajima, Tomoko Araya, Masahiro Kamoshida |
Rok vydání: |
2016 |
Předmět: |
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Zdroj: |
IEEE Journal of Solid-State Circuits. 51:196-203 |
ISSN: |
1558-173X 0018-9200 |
Popis: |
A 75 mm $^{2}$ low power 64 Gb MLC NAND flash memory capable of 30 MB/s program throughput and 533 MB/s data transfer rate at 1.8 V supply voltage is developed in 15 nm CMOS technology. 36% power reduction from 3.3 V design is achieved by a new pumping scheme. New low current peak features reduce a multi-die concurrent programming peak by 65% for 4-die case, and an erase verifying peak by 40%, respectively. Nanoscale transistors reducing bit-line discharge time by 70% is introduced to improve performance. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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