| Autor: |
Ajayan K R, Aswin Shenoy A |
| Rok vydání: |
2015 |
| Předmět: |
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| Zdroj: |
2015 International Conference on Control Communication & Computing India (ICCC). |
| DOI: |
10.1109/iccc.2015.7432962 |
| Popis: |
In this paper, we present a device oriented methodology to analyze the process parameter as well as BSIM model parameter variations for the CMOS devices that may affect the circuit performance in variable process conditions. Here the simultaneous variation of the multiple process parameters at a time is considered for obtaining the circuit performance parameters to account the impact of variability. Statistical Design of Experiments (DOE) technique is exploited to design the number of experiments to be conducted with the process factors with the device parameters and circuit performance metrics. Knowledge of process as well as device variability is necessary in the circuit design which gives an idea of undesirable circuit variations according to the change in process parameter conditions. A Look up table (LUT) approach is presented to observe the direct impact of process variability in VLSI circuits. The analysis has been successfully carried out with a CMOS differential amplifier circuit in latest 28nm analog technology. Gain and bandwidth are obtained as the circuit parameters for observing the effect of the process variability. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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