Approaches for reducing power consumption of the high-resolution pipelined analog-to-digital converters

Autor:	Ivan Piatak, Aleksandr V. Sidun
Rok vydání:	2018
Předmět:	Computer science High resolution Converters law.invention Capacitor law Power consumption Hardware_INTEGRATEDCIRCUITS Electronic engineering Operational amplifier Stage (hydrology) Hardware_ARITHMETICANDLOGICSTRUCTURES MATLAB computer computer.programming_language
Zdroj:	2018 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (EIConRus).
DOI:	10.1109/eiconrus.2018.8317074
Popis:	In this paper techniques for reducing power consumption of the high-resolution ADC are discussed. The main requirements for DC gain and capacitor mismatch of 2.5-bit multiplying digital-to-analog converter (MDAC) are defined. Simulation results in MATLAB demonstrate dynamic and static performances of a 12-bit 2.5-bit/stage pipelined ADCs depending on capacitor mismatch and op-amp DC gain of the stage.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::ed15ecff1837badd36650ba5505c25b3 https://doi.org/10.1109/eiconrus.2018.8317074 Zobrazit plný text záznamu