A Three-Layer Resist Process for T - and T -Gates in High Electron Mobility Transistor Fabrication
| Autor: | Stéphane Piotrowicz, J. Gruenenpuett, J.C. Jacquet, M. Madel, S. Riedmuller, Sylvain Delage, Ferdinand Scholz, G. Callet, Hervé Blanck, Christophe Chang |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
010302 applied physics
Materials science business.industry RF power amplifier Transistor 02 engineering and technology High-electron-mobility transistor 021001 nanoscience & nanotechnology 01 natural sciences Capacitance law.invention Resist law Logic gate 0103 physical sciences Optoelectronics 0210 nano-technology business Lithography Ohmic contact |
| Zdroj: | 2018 13th European Microwave Integrated Circuits Conference (EuMIC). |
| DOI: | 10.23919/eumic.2018.8539955 |
| Popis: | By utilizing a novel three-layer resist process, InAIN/AIN/GaN T - and T -gate high electron mobility transistors with 0.1 μm gate lengths and below have been demonstrated. This process is based on direct electron-beam lithography with a single exposure step. Furthermore, the effect of different T -gate shapes on RF power performance is reported. A T -gate shift to the source side of the Ohmic contact, results in lower gate-to-drain capacitance and in higher transistor RF transducer gain G t . |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|