| Autor: |
Min-Cheol Kang, Mei-Ying Jin, Gyu-Sam Cho, Pan-Bong Ha, Ji-Hye Jang, Young-Hee Kim |
| Rok vydání: |
2010 |
| Předmět: |
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| Zdroj: |
The Journal of the Korean Institute of Information and Communication Engineering. 14:183-190 |
| ISSN: |
2234-4772 |
| DOI: |
10.6109/jkiice.2010.14.1.183 |
| Popis: |
We propose an eFuse one-time programmable (OTP) memory cell based on a logic process, which is programmable by an external program voltage. For the conventional eFuse OTP memory cell, a program datum is provided with the SL (Source Line) connected to the anode of the eFuse going through a voltage drop of the SL driving circuit. In contrast, the gate of the NMOS program transistor is provided with a program datum and the anode of the eFuse with an external program voltage (FSOURCE) of 3.8V without any voltage drop for the newly proposed eFuse cell. The FSOURCE voltage of the proposed cell keeps either 0V or the floating state at read mode. We propose a clamp circuit for being biased to 0V when the voltage of FSOURCE is in the floating state. In addition, we propose a VPP switching circuit switching between the logic VDD ( |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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