Enhanced gate-controlled-diode current (EGCDC) measurement
| Autor: | P. Aum, Jen-Tai Hsu, Chand R. Viswanathan, D. Chan |
|---|---|
| Rok vydání: | 2002 |
| Předmět: |
Materials science
business.industry Heterostructure-emitter bipolar transistor Transistor Parasitic bipolar transistor Hardware_PERFORMANCEANDRELIABILITY Capacitance law.invention law Hardware_INTEGRATEDCIRCUITS Optoelectronics Current (fluid) business Sensitivity (electronics) Hardware_LOGICDESIGN Diode Voltage |
| Zdroj: | ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures. |
| DOI: | 10.1109/icmts.1993.292895 |
| Popis: | A technique for the measurement of the gate-controlled-diode-current (GCDC) in short-channel MOS transistors is described. This technique uses the internal bipolar action of the MOS transistor to amplify the GCDC, thereby extending the sensitivity of the measurement. Results of measurements on small geometry devices, as well as on larger devices, are given. A model based on parasitic bipolar transistor action is given for the enhanced gate-controlled diode current (EGCDC). > |
| Databáze: | OpenAIRE |
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