| Autor: |
Kwang Sing Yew, Ee Jan Khor, Choon Gay Lee, Ramasamy Chockalingam, Juan Boon Tan |
| Rok vydání: |
2020 |
| Předmět: |
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| Zdroj: |
2020 IEEE International Interconnect Technology Conference (IITC). |
| DOI: |
10.1109/iitc47697.2020.9515678 |
| Popis: |
Control of variation in interconnects resistance and capacitance (RC) model due to variability in semiconductor manufacturing is extremely challenging, especially to meet the stringent automotive sigma requirements of Cp/Cpk 1.67. Real-time in-line APC improves R and C sigma by reducing LtL variation, however, WiW variation is non-negligible as it degrades RC correlation and causes off-centering in the model when R and C test keys are not located at same location. We demonstrate interconnects RC model within < 2% from target by using APC to mitigate WiW variation with real-time tuning of CMP oxide loss target for various radial zones in a wafer instead of whole wafer. We also demonstrate the concept of interconnects process integration with dynamic routing to mitigate tools variation by continuous learning of tools historical data for better variability control in order to further optimize the RC model. This provides insights to the application of machine learning to realize industry 4.0 smart and efficient concept for semiconductor manufacturing. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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