GaAs MESFETs fabricated on Si substrates using a SrTiO3 buffer layer
| Autor: | Jeffrey M. Finder, S. Rockwell, K. Eisenbeiser, Rudy Emrick, Corey Overgaard, Zhiyi Jimmy Yu, John Holmes, Ravindranath Droopad, William J. Ooms |
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| Rok vydání: | 2002 |
| Předmět: |
Power-added efficiency
Electron mobility Materials science business.industry Transistor Electrical engineering Substrate (electronics) Electronic Optical and Magnetic Materials Gallium arsenide Amorphous solid law.invention chemistry.chemical_compound chemistry law Optoelectronics Field-effect transistor Electrical and Electronic Engineering business Power density |
| Zdroj: | IEEE Electron Device Letters. 23:300-302 |
| ISSN: | 1558-0563 0741-3106 |
| DOI: | 10.1109/led.2002.1004215 |
| Popis: | Heteroepitaxial growth of GaAs on an Si substrate has been achieved through the use of crystalline SrTiO/sub 3/ (STO) and amorphous SiO/sub 2/ buffer layers. The buffer layers serve to accommodate some of the lattice mismatch between the substrate and the GaAs epilayers. Field-effect transistors fabricated in the GaAs epilayers show performance comparable to similar devices fabricated on GaAs substrates. The mobility in the GaAs/STO/Si sample is 2524 cm/sup 2//Vs compared to a GaAs/GaAs sample with mobility of 2682 cm/sup 2//Vs. A 0.7 /spl mu/m gate length device has I/sub d max/ of 367 mA/mm and G/sub m max/ of 223 mS/mm. These devices also have good RF performance with f/sub max/ of 14.5 GHz and class AB power density of 90 mW/mm with an associated power-added efficiency of 38% at 1.9 GHz. This RF performance is within experimental error of similar devices fabricated on GaAs substrates. Preliminary reliability results show that after 800 h at 200/spl deg/C, the GaAs/STO/Si sample showed 1.2% degradation in drain current. |
| Databáze: | OpenAIRE |
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